PCA9555BS
16-bit I2C-bus and SMBus I/O port with interrupt.
The PCA9555 is a 24-pin CMOS device that provides 16 bits of General Purpose parallel Input/Output (GPIO) expansion for I2C-bus/SMBus applications and was developed to enhance the NXP Semiconductors family of I2C-bus I/O expanders.
The improvements include higher drive capability, 5 V I/O tolerance, lower supply current, individual I/O configuration, and smaller packaging. I/O expanders provide a simple solution when additional I/O is needed for ACPI power switches, sensors, push buttons, LEDs, fans, etc. The PCA9555 consists of two 8-bit Configuration (Input or Output selection); Input, Output and Polarity Inversion (active HIGH or active LOW operation) registers. The system master can enable the I/Os as either inputs or outputs by writing to the I/O configuration bits.
The data for each Input or Output is kept in the corresponding Input or Output register. The polarity of the read register can be inverted with the Polarity Inversion register. All registers can be read by the system master. Although pin-to-pin and I2C-bus address compatible with the PCF8575, software changes are required due to the enhancements, and are discussed in Application Note AN469. The PCA9555 open-drain interrupt output is activated when any input state differs from its corresponding input port register state and is used to indicate to the system master that an input state has changed. The power-on reset sets the registers to their default values and initializes the device state machine.
Three hardware pins (A0, A1, A2) vary the fixed I2C-bus address and allow up to eight devices to share the same I2C-bus/SMBus. The fixed I2C-bus address of the PCA9555 is the same as the PCA9554, allowing up to eight of these devices in any combination to share the same I2C-bus/SMBus.
PCA9555是一款24引脚CMOS器件，为I2C总线/SMBus应用提供16位通用并行输入/输出(GPIO)扩展且开发用于增强NXP Semiconductors系列的I2C总线I/O扩展器。改进内容包括更高的驱动能力、5 V I/O容限、更低的供电电流、独立的I/O配置和更小的封装。ACPI电源开关、传感器、按钮、LED、风扇等需要额外的I/O时，I/O扩展器提供简易的解决方案。
PCA9555由两个8位配置（输入或输出选择）、输入、输出和极性反转（高电平有效或低电平有效操作）寄存器组成。系统主器件可通过写入I/O配置位将I/O用作输入或输出。每个输入或输出的数据保留在对应的输入或输出寄存器中。通过极性反转寄存器可反转读取寄存器的极性。系统主器件可读取所有寄存器。虽然引脚对引脚和I2C总线地址都兼容PCF8575，但是因增强功能而需要软件更改，这在应用注意事项AN469中讨论。
当任何输入状态与其对应的输入端口寄存器状态不同时，会激活PCA9555开漏中断输出并用于通知系统主器件输入状态已改变。上电复位会将寄存器设为其默认值并初始化器件状态机。
特征：
1. Operating power supply voltage range of 2.3 V to 5.5 V
2. 5 V tolerant I/Os
3. Polarity Inversion register
4. Active LOW interrupt output
5. Low standby current
6. Noise filter on SCL/SDA inputs
7. No glitch on power-up
8. Internal power-on reset
9. 16 I/O pins which default to 16 inputs
10. 0 Hz to 400 kHz clock frequency
11. ESD protection exceeds 2000 V HBM per JESD22-A114, 200 V MM per JESD22-A115, and 1000 V CDM per JESD22-C101
12. Latch-up testing is done to JEDEC Standard JESD78 which exceeds 100 mA
13. Six packages offered: DIP24, SO24, SSOP24, TSSOP24, HVQFN24 and HWQFN24
询价
